CHIP DESIGN · COURSE

Digital Logic & Boolean Reasoning

Learn digital hardware as a timed physical system, not a collection of gate symbols. Every chapter moves from an explicit specification to a derivation, a cycle or timing trace, a failure boundary, and executable evidence. The goal is to explain what state exists, who owns it, when it may change, and what observation proves the circuit obeyed its contract.

Before this course: Comfort with whole numbers, powers of two, simple algebra, and careful table reading; no electronics or HDL experience required.

COURSE FACTSStage, chapters, units, prerequisite, and outcome
Chapter 1

Voltage is physical; a logic value is interpreted

Objective: Why can two gates agree on Boolean behavior but still be electrically incompatible?

A wire carries a voltage that varies continuously with time. Digital logic maps ranges of that voltage to symbols such as 0 and 1. The mapping is an engineering contract defined by input-low, input-high, output-low, and output-high limits. It permits reasoning with two symbols while devices still operate through analog current, charge, delay, noise, and temperature-dependent behavior.

The interval between guaranteed low and guaranteed high is not a third ordinary logic value. It is an invalid or uncertain region in which a receiver is not required to choose predictably. A simulator’s X can represent several kinds of ignorance, but it is not a measured intermediate voltage. Keeping physical uncertainty and symbolic unknowns distinct prevents false confidence.

If a driver’s guaranteed VOH(min) is at least the receiver’s VIH(min), and its VOL(max) is at most the receiver’s VIL(max), then valid driven levels fall inside the receiver’s guaranteed interpretation regions.

For a driven 1, the worst guaranteed driver voltage is VOH(min). The inequality VOH(min)≥VIH(min) keeps even that worst case inside the receiver’s high region.

For a driven 0, the worst guaranteed driver voltage is VOL(max). The inequality VOL(max)≤VIL(max) keeps that case inside the receiver’s low region.

The remaining differences form noise margins. Disturbance smaller than the relevant margin cannot move a guaranteed output beyond the guaranteed receiver threshold.

A driver guarantees VOL≤0.4 V and VOH≥2.7 V. A receiver guarantees low for V≤0.8 V and high for V≥2.0 V. Find both static noise margins.

  1. Low margin is the distance from the worst driver low to the receiver low boundary: 0.8−0.4=0.4 V.
  2. High margin is the distance from the receiver high boundary to the worst driver high: 2.7−2.0=0.7 V.
  3. Both are positive, so the static level contracts are compatible. This calculation does not yet prove timing, edge-rate, loading, or power compatibility.

Result: Low noise margin 0.4 V; high noise margin 0.7 V.